LP_SWR=NO_ACTION, MKS_EN=SELECT_OTP, PROG_ZMK=NO_ACTION, LP_SWR_DIS=ENABLED, HAC_CLEAR=NO_ACTION, SSM_SFNS_DIS=ENABLED, SSM_ST_DIS=ENABLED, HAC_LOAD=NO_ACTION, HAC_EN=DISABLED
SNVS_HP Command Register
| SSM_ST | SSM State Transition Transition state of the system security monitor |
| SSM_ST_DIS | SSM Secure to Trusted State Transition Disable When set, disables the SSM transition from secure to trusted state 0 (ENABLED): Secure to Trusted State transition is enabled 1 (DISABLED): Secure to Trusted State transition is disabled |
| SSM_SFNS_DIS | SSM Soft Fail to Non-Secure State Transition Disable When set, it disables the SSM transition from soft fail to non-secure state 0 (ENABLED): Soft Fail to Non-Secure State transition is enabled 1 (DISABLED): Soft Fail to Non-Secure State transition is disabled |
| LP_SWR | LP Software Reset When set to 1, most registers in the SNVS_LP section are reset, but the following registers are not reset by an LP software reset: Monotonic Counter Secure Real Time Counter Time Alarm Register This bit cannot be set when the LP_SWR_DIS bit is set 0 (NO_ACTION): No Action 1 (RESET): Reset LP section |
| LP_SWR_DIS | LP Software Reset Disable When set, disables the LP software reset 0 (ENABLED): LP software reset is enabled 1 (DISABLED): LP software reset is disabled |
| SW_SV | Software Security Violation When set, the system security monitor treats this bit as a non-fatal security violation |
| SW_FSV | Software Fatal Security Violation When set, the system security monitor treats this bit as a fatal security violation |
| SW_LPSV | LP Software Security Violation When set, SNVS_LP treats this bit as a security violation |
| PROG_ZMK | Program Zeroizable Master Key This bit activates ZMK hardware programming mechanism 0 (NO_ACTION): No Action 1 (PROGRAM_KEY): Activate hardware key programming mechanism |
| MKS_EN | Master Key Select Enable When not set, the one time programmable (OTP) master key is selected by default 0 (SELECT_OTP): OTP master key is selected as an SNVS master key 1 (SELECT_PER_LPMKCR): SNVS master key is selected according to the setting of the MASTER_KEY_SEL field of LPMKCR |
| HAC_EN | High Assurance Counter Enable This bit controls the SSM transition from the soft fail to the hard fail state 0 (DISABLED): High Assurance Counter is disabled 1 (ENABLED): High Assurance Counter is enabled |
| HAC_LOAD | High Assurance Counter Load When set, it loads the High Assurance Counter Register with the value of the High Assurance Counter Load Register 0 (NO_ACTION): No Action 1 (LOAD_HAC): Load the HAC |
| HAC_CLEAR | High Assurance Counter Clear When set, it clears the High Assurance Counter Register 0 (NO_ACTION): No Action 1 (CLEAR_HAC): Clear the HAC |
| HAC_STOP | High Assurance Counter Stop This bit can be set only when SSM is in soft fail state |
| NPSWA_EN | Non-Privileged Software Access Enable When set, allows non-privileged software to access all SNVS registers, including those that are privileged software read/write access only |